Senior Analog/Mixed-Signal ASIC Design Engineer
The project is ongoing for the design of a mixed-signal ASIC for biomedical applications.
The 40nm CMOS IC includes analog, digital and mixed-signal circuits. The candidate will contribute to the design of this IC.
- At least 5 years of experience in analog circuit design, simulation and layout using Cadence.
- Designing circuits such as amplifiers, buffers, samplers, current sources, etc.
- Understanding of CMOS technologies in general: working with design rules, understanding process specification documents.
- Creating simulation test-benches for dc, ac, transient simulations using ADE-L and ADE-XL.
- Understanding low-noise analog circuit design.
- Familiar with CMOS technologies at various technology nodes such as 180nm to 40nm.
- Experience with ADC and/or DAC design is beneficial.
- Experience with mixed-signal design and verification using AMS is a plus.
- Basic knowledge of digital design/ Encounter is beneficial.
- Experience with full-custom IC layout design using Cadence tools Virtuoso, Layout-XL, DRC and LVS.
- Understanding and implementing layout techniques such as symmetry and shielding.
- Creating layout designs according to a floorplan.
- Basic understanding of Unix.
- Team player: daily interaction with design team.
- Reporting progress and issues.
LOCATION: Eindhoven for at least the first month. Remote working optional depending on project and progress
DURATION: 6 months initially (high chances of extension)
If you are interested in the above description, apply with your CV
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For more information please contact Daria Petrova on +31 (0)20 20 44 502